Model Order Reduction for Large-scale Circuits Using Higher Order Dynamic Mode Decomposition
Model Order Reduction for Large-scale Circuits Using Higher Order Dynamic Mode Decomposition
Model order reduction (MOR) has long been a mainstream strategy to accelerate large-scale transient circuit simulation. Dynamic Mode Decomposition (DMD) represents a novel data-driven characterization method, extracting dominant dynamical modes directly from time-domain simulation data without requiring explicit system equations. This paper first deduces the DMD algorithm and then proposes high order dynamic mode decomposition (HODMD) incorporating delayed embedding technique, specifically targeting computational efficiency in large-scale circuit simulations. Compared with the DMD method, the HODMD method overcomes the problem that the output signal cannot be reconstructed when the spatial resolution is insufficient. The proposed HODMD algorithm is applicable to general circuits and does not impose any constraints on the topology of the pertinent circuit or type of the components. Three representative numerical test cases are presented to systematically validate both the computational efficiency and accuracy of the proposed HODMD method.
Na Liu、Chengliang Dai、Qiuyue Wu、Qiuqi Li、Guoxiong Cai
电工基础理论
Na Liu,Chengliang Dai,Qiuyue Wu,Qiuqi Li,Guoxiong Cai.Model Order Reduction for Large-scale Circuits Using Higher Order Dynamic Mode Decomposition[EB/OL].(2025-08-05)[2025-08-16].https://arxiv.org/abs/2508.03131.点此复制
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