Chipstitch: A Scalable and Cost-Efficient Platform for Accelerated Silicon Prototyping
Yuanhan Li Wenbo Zhu Christopher Torng Jeongeun Kim Sabrina Yarzada Paul Yi-Chia Chen
作者信息
Abstract
Silicon evidence serves as a critical receipt of credibility across academia and industry, validating innovation and signaling feasibility in ways that simulations alone cannot. Its value is difficult to quantify but widely recognized for driving hardware-software innovation. However, access to this receipt has remained severely constrained by high dollar costs and engineering effort barriers, which lock out innovators unable to afford it. To bridge this gap, we consider a new design paradigm called silicon query architectures that spans EDA, architecture, and VLSI and aims to transform single-die area into a substrate for scalable, tessellated, intra-die silicon receipts, dropping the cost of entry by one to two orders of magnitude without sacrificing research-grade specifications. We concretely propose Chipstitch, a silicon query architecture realized with three contributions: an algorithmic three-layer approach to repeatable and scalable tessellation with a keystone algorithm, a scalable architecture-VLSI system interconnect that fits within interstitial regions of the tessellation with research-grade timing and clocking, and a grid-aligned perimeter-based power shutdown technique that mitigates overheads for research-grade power measurement. Using a vertically integrated methodology extending down to post-layout VLSI implementation, we demonstrate Chipstitch on a 25-site heterogeneous design scenario, achieving 9.9x-14.5x total cost advantage and up to two orders of magnitude reduction in single-receipt entry cost compared to a traditional multi-project wafer baseline in Skywater 130nm and Intel 16nm process nodes.引用本文复制引用
Yuanhan Li,Wenbo Zhu,Christopher Torng,Jeongeun Kim,Sabrina Yarzada,Paul Yi-Chia Chen.Chipstitch: A Scalable and Cost-Efficient Platform for Accelerated Silicon Prototyping[EB/OL].(2026-09-17)[2026-10-12].https://arxiv.org/abs/2512.10089.学科分类
半导体技术
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