基于折叠免标度CORDIC与PID的FPGA自动增益控制设计
FPGA Design of Automatic Gain Control Based on Folded Scale-Free CORDIC and PID
韩雨辰 1吕旌阳1
作者信息
- 1. 北京邮电大学信息与通信工程学院，北京，100876
- 折叠
摘要
针对高铁应答器信号大动态范围导致的幅值不稳定问题，设计并实现一种基于FPGA的高性能自动增益控制模块，旨在优化幅值估计模块的计算延时与硬件资源消耗，同时解决传统增益算法存在的响应慢及瞬态超调等缺陷。在幅值计算环节，提出一种折叠免标度CORDIC算法，通过八分圆折叠映射压缩收敛域以减少流水线迭代级数，并利用近似旋转矩阵在原理上消除标度因子；在AGC算法设计环节，引入增量型PID理论改进现有接收系统中的AGC算法，通过比例项提升对信号跳变的跟踪速度，并发挥微分项对误差趋势的预判与阻尼作用，以抑制增益调节过程中的瞬态超调与震荡。仿真与实测结果显示，优化后的CORDIC算法在迭代级数缩减至3级且零DSP资源消耗的前提下，计算相对误差控制在0.746%以内，满足系统精度要求。针对纺锤型包络信号的对比测试表明，改进型算法有效消除了初始阶段的瞬态超调，并在信号快速衰减期实现了稳定的实时跟踪，输出包络平坦且无削波失真。结果表明，该设计在降低硬件实现复杂度的同时，显著提升了AGC系统的动态响应速度与稳态稳定性。
Abstract
To address the issue of amplitude instability caused by the wide dynamic range of high-speed railway transponder signals, this paper presents a high-performance FPGA-based Automatic Gain Control (AGC) module. The design aims to optimize the computational latency and hardware resource consumption of the amplitude estimation module while overcoming the limitations of slow response and transient overshoot inherent in traditional gain control algorithms. For amplitude estimation, a folded scaling-free CORDIC algorithm is proposed. This method employs octant folding mapping to compress the convergence domain, reducing the pipeline iteration stages, and utilizes an approximate rotation matrix to theoretically eliminate the scale factor. Regarding the control strategy, an incremental PID algorithm is introduced to enhance the existing AGC loop. The proportional term improves tracking speed in response to sudden signal changes, while the derivative term leverages error trend prediction and damping effects to suppress transient overshoot and oscillation during gain adjustment. Simulation and experimental results demonstrate that the optimized CORDIC algorithm achieves a relative calculation error of less than 0.746%, satisfying system precision requirements with only three iteration stages and zero DSP resource consumption. Comparative tests using spindle-shaped envelope signals indicate that the improved algorithm effectively eliminates initial transient overshoot and maintains stable real-time tracking during rapid signal decay, yielding a flat output envelope without clipping distortion. Consequently, the proposed design significantly enhances the dynamic response speed and steady-state stability of the AGC system while reducing hardware implementation complexity.关键词
信号与信息处理/自动增益控制/CORDIC/增量型PID/FPGAKey words
Signal and information processing/Automatic Gain Control/CORDIC/Incremental PID/FPGA引用本文复制引用
韩雨辰,吕旌阳.基于折叠免标度CORDIC与PID的FPGA自动增益控制设计[EB/OL].(2026-01-22)[2026-01-25].http://www.paper.edu.cn/releasepaper/content/202601-49.学科分类
电子技术概论/电子电路/无线电设备、电信设备/计算技术、计算机技术
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