三值时序逻辑的脉冲分类,触发器类型分析和时钟分析
nalysis of Ternary Logic Pulses, Triggers and Clock
三值时序逻辑系统需要三值逻辑触发器,而三值触发器又与三值逻辑的脉冲有关,三值逻辑的脉冲比二值逻辑脉冲复杂,所以三值触发器的种类和构成也必定比二值触发器复杂。二值数字逻辑的脉冲只有两种形式:上升沿脉冲和下降沿脉冲,所以构成的二值基本触发器也有两种:上升沿触发器和下降沿触发器[1]。三值数字逻辑的脉冲有六种基本形式,有四种基本脉冲,有两种组合脉冲,所以与脉冲相对应,三值逻辑需要四种基本脉冲触发器,两种组合脉冲触发器。
ernary time sequence system needs ternary logic triggers, ternary logic trigger is related with ternary logic pulse. Ternary logic pulse is more complex than binary pulse, so classes and construction of ternary triggers must be more complex than binary triggers. There are two kinds of pulses in binary digital logic, that is up pulse and down pulse, so there are two kinds of triggers, that is up edge trigger and down edge trigger. There are six kinds of pulses in ternary digital logic, four kinds of them are basic pulses, two of them are combined pulses, and correspondingly, ternary logic needs four kinds of basic pulse triggers and two kinds of combined pulse triggers.
朱玉成
电子电路
三值逻辑,多值逻辑,基本脉冲,组合脉冲触发器
ernary Logic Multi-Valued Logic Basic Pulse Combined Pulse Trigger
朱玉成.三值时序逻辑的脉冲分类,触发器类型分析和时钟分析[EB/OL].(2007-10-25)[2025-08-18].http://www.paper.edu.cn/releasepaper/content/200710-465.点此复制
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