多路并行流水线分布式算法的FIR滤波器实现
Implementation of multi-channel parallel pipeline FIR filter based on Distribution Algorithm
本文提出了一种基于分布式算法的并行FIR滤波器结构，与传统的MAC结构相比有处理速度快、占用资源少等优点。首先从理论上分析了分布式算法的原理，再以八路并行为例，对15阶系数FIR滤波器设计了流水线结构，最后在Xilinx的7系列芯片上进行了实现。FPGA编译以及下载测试结果表明，本滤波器与MAC结构相比占用较少资源，达到较高数据吞吐率。
In this paper, it is presented that a parallel FIR filter architecture based on Distributed Algorithm. Compared with the traditional MAC structure, it has the advantages of faster processing speed and less resources. First of all, the principal of Ditributed Algorithm is analysed in the theoretical level. Then, a pipline structure FIR filter is designed with eight-channels and 15 cofficients. Finally, it is implemented on the chip of Xilinx 7 series. Compilation and deployment results show that the parallel FIR filter run at less resource and higher rate.
牛莉、严伟、刘京
微电子学、集成电路电子电路
有限脉冲响应滤波器分布式算法现场可编程门阵列
FIR FilterDA algorithmFPGA
牛莉,严伟,刘京.多路并行流水线分布式算法的FIR滤波器实现[EB/OL].(2014-11-28)[2025-08-11].http://www.paper.edu.cn/releasepaper/content/201411-587.点此复制
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