一种低复杂度和低存储需求的turbo架构LDPC码
Low Complexity and Memory-Efficient Turbo Architecture for LDPC codes
本文提出了一种具有低复杂度和低存储需求的并行级联码—并行交织级联Gallager码（PICGC）。PICGC兼具了长LDPC码优秀性能和短LDPC码的低编译码复杂度。本文介绍了PICGC的构造方法，基于BP的译码算法，并分析了节省存储量。仿真显示PICGC可以有效地降低译码复杂度和需要的存储量，而由此造成的性能损失则可以忽略不计。
In this paper, a low complexity and memory-efficient concatenated codes called Parallel Interleaved Concatenated Gallager Codes (PICGCs) are presented. PICGCs combine both better BER performance of long codes and lower complexity and less memory required of short codes. We introduce the construction of PICGCs. The decoding algorithm based on sum-product algorithm is proposed. We also analyze the memory saving and derive its upper bound. The Simulation results show PICGCs can reduce complexity and memory required of decoding significantly with little sacrifice in performance.
熊磊
通信微电子学、集成电路
低密度奇偶校验（LDPC）码，并行交织级联Gallager码（PICGC），低复杂度，低存储量
Low-density parity-check (LDPC) codes Parallel Interleaved Concatenated Gallager Codes (PICGCs) low complexity memory-efficient
熊磊.一种低复杂度和低存储需求的turbo架构LDPC码[EB/OL].(2005-12-16)[2025-08-02].http://www.paper.edu.cn/releasepaper/content/200512-414.点此复制
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