卷积码编码器的Verilog HDL设计
he Design of Convolution Code Based on Verilog HDL
卷积码是一种性能优良的差错控制编码。如传输中产生差错的数目在码的纠错能力之内，可以对差错进行定位并自动加以纠正。本文在阐述卷积码编码器基本工作原理的基础上提出了在QuartusⅡ开发平台上基于Verilog HDL语言设计了(2,1,4)卷积码编码器的方法。仿真结果表明了该编码器的正确性和合理性。
onvolution code is a better code of error controlling performance.The convolutional encoder is used to encode data so that the decoder can correct errors introduced due to noise in the channel. This paper discusses the encoding principle of the convolution code, raise a method of designing the (2,1,4) convolution encoder using Verilog HDL language based on QuartusⅡ, and simulate results prove the correctness.
孔晓燕、刘丹谱
微电子学、集成电路通信
卷积码编码器Verilog HDLQuartusⅡ
onvolution CodeEncodeVerilog HDLQuartusⅡ
孔晓燕,刘丹谱.卷积码编码器的Verilog HDL设计[EB/OL].(2009-02-17)[2025-08-10].http://www.paper.edu.cn/releasepaper/content/200902-808.点此复制
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