VS编码器帧内预测硬件实现
he Hardware Implementation of Intra Frame Prediction for AVS Encoder
针对帧内预测的快速算法,由于DSP架构软件顺序执行的局限性难以满足实时性要求,而FPGA以其高速的计算速度和强大的并行处理能力成为H.264和AVS编解码的理想平台。本文在FPGA平台上采用资源共享、并行处理和流水线结构实现了亮度帧内预测算法。该方法在分析AVS帧内亮度预测5种预测模式的基础上,将像素预测与模式判决在一个模块中完成,并且利用各模式预测的相似性,实现运算单元共享和多种模式并行执行,兼顾了处理速度和实现代价。仿真及综合结果表明该设计能够完全满足标清(704×576,30f/s)数字视频的实时处理要求。
he fast algorithm of intra prediction is difficult to meet the real-time demand on DSP because of the limitations of sequential order of DSP software architecture; while FPGA with the high calculation speed and strong parallel processing ability has become the ideal platform for H.264 and AVS codec. In this paper, a method which applies the resource-sharing, high parallel and pipeline structure has been put foward .The method, in the analysis of 5 prediction modes of AVS intra luma and their similarity in operation, has put the pixel prediction and mode decision in a module and realized the sharing of public operation unit and concurrent execution of a variety of modes on consideration of both processing speed and realizing costs. The simulation and comprehensive results show that the design has been completely meet real-time processing requirements of the standard (704 x 576, 30 f/s) digital video.
张刚、向红莉
微电子学、集成电路电子电路计算技术、计算机技术
VS标准帧内预测资源共享并行处理
VSIntra Frame PredictionResource-sharingParallel Processing
张刚,向红莉.VS编码器帧内预测硬件实现[EB/OL].(2012-03-19)[2025-08-16].http://www.paper.edu.cn/releasepaper/content/201203-551.点此复制
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