降低高速数字系统中串扰的有源电路设计
esigning of the active circuit to reduce crosstalk
针对高速数字系统中平行互连线间的串扰问题,提出并完成了一种能降低串扰幅度和串扰所引起抖动的有源电路设计。根据串扰和抖动产生机理,在接收器中用识别电路来判决一对互连线上传输信号的传输模式:奇模、偶模或两者的叠加模式,并用该判决结果控制修正电路,减小串扰幅度和串扰引起的抖动,使最终接收信号质量得到显著改善。在ADS中进行了系统仿真验证,结果表明经过该电路的修正之后,最终接收信号与无串扰时的信号质量相当,显著提高系统可靠性,实现高速高密度互连线上信号的高质量传输。
n active circuit is designed to reduce the amplitude of crosstalk and crosstalk induced jitter between two parallel interconnects in high-speed digital systems in this paper. Based on the crosstalk and jitter mechanism, a decision circuit is used to decide the propagation mode on a pair of interconnects: odd mode, even mode or superimposition of two previous modes. The obtained results are then used to control the corrected-circuit. Amplitude of crosstalk and crosstalk induced jitter are both alleviated, and quality of the resulting signal is improved remarkably. To validate the efficiency of the circuit, a system-level simulation is implemented in ADS. The results also indicated that the ultimate signal quality after corrected by the active circuit is almost equal to that of signal without crosstalk. Reliability of the system is greatly improved and the signal can be transmitted with high quality in high-speed and high-density interconnects.
张木水、李丽平、潘健、李玉山、贾琛
电子电路微电子学、集成电路电子技术应用
串扰抖动奇模偶模
crosstalkjitterodd modeeven mode
张木水,李丽平,潘健,李玉山,贾琛.降低高速数字系统中串扰的有源电路设计[EB/OL].(2009-01-09)[2025-08-18].http://www.paper.edu.cn/releasepaper/content/200901-355.点此复制
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