RS(204,188)编码模块的设计与实现
the design and implementation of RS (204,188) encoder module
本文详细介绍了RS编码器的工作原理，介绍了有限域常数乘法器的实现方法；首先，通过编写M文件实现RS(204,188)编码器并在MATLAB中对其进行模拟仿真，然后，采用VHDL语言编写RS编码器的RTL代码并在MODELSIM中对其进行功能仿真，最后，对两种测试环境下的仿真结果进行了对比和分析，并给出了仿真结果图；通过Quartus II编译之后，最终在FPGA上实现。
his paper describes the working principle of RS encoder, and realization methods of the finite field constant multiplier; first of all, the RS (204,188) encoder is implemented by using M files simulated in MATLAB; second, RTL code is made by VHDL and is simulated in MODELSIM, finally, results are compared and analyzed between the two simulation environments, and the simulation Figures are in show; it is finally implemented in the FPGA after Quartus II compilation.
陈钢、谢志军、高松
微电子学、集成电路计算技术、计算机技术电子电路
RS编码器有限域MODELSIMFPGA
RS encoderfinite fieldMODELSIMFPGA
陈钢,谢志军,高松.RS(204,188)编码模块的设计与实现[EB/OL].(2010-08-31)[2025-08-02].http://www.paper.edu.cn/releasepaper/content/201008-468.点此复制
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