-DC变换器的改进型仿TYPE-III全集成补偿网络设计
fully integrated design of improved Pseudo Type-III compensation for DC-DC converters
本文分析了DC-DC 变换器的TYPE-3补偿网络和仿TYPE-3补偿网络，在此基础上设计了一种改进型仿TYPE-3补偿网络。利用频带分裂的思想，将补偿网络的频率响应分为低频和高频两个路径，使用电压-电流-电压（V-I-V）加法器实现两路信号的相加，用一个单级运放和一个小电容实现低通路径。电路采用标准0.18μm CMOS工艺设计，并应用在一个Buck变换器中，变换器的开关频率为1MHz。仿真结果表明：当Buck变换器的输出负载在200mA至400mA之间跳变时，输出电压在25μs内可以稳定。和传统TYPE-3补偿网络相比，本文设计的补偿网络面积减小了60%，功耗降低了90%。
In this paper, we analyze TYPE-3 and Pseudo TYPE-3 compensation network of the DC-DC converter. Then an improved Pseudo TYPE-3 compensation is presented. With the idea of spectrum-splitting, the frequency band of the compensation is divided into two paths: low and high frequency bands. A voltage-current-voltage (V-I-V) adder is designed to achieve the summation of the two band signals. We also presents a low-pass filter consisting of a simple op-amp and a small capacitor to achieve the low frequency band. The design uses a standard CMOS 0.18μm process and the simulation results show that the DC-DC converter's output is settled within 25μs for a load current step between 200mA and 400mA. Compared to the traditional TYPE-3 compensation, the chip area and power consumption of the improved compensation network is reduced by 60% and 90% respectively.
陆浩、郭卓奇、耿莉、高源、范世全
变压器、变流器、电抗器电子电路微电子学、集成电路
集成电路设计补偿网络电压-电流-电压加法器低通滤波器
IC designTYPE-3 compensation networkvoltage-current-voltage (V-I-V) adderlow-pass filter
陆浩,郭卓奇,耿莉,高源,范世全.-DC变换器的改进型仿TYPE-III全集成补偿网络设计[EB/OL].(2012-09-14)[2025-08-16].http://www.paper.edu.cn/releasepaper/content/201209-154.点此复制
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