面向对称多核体系结构的FPGA仿真模型

he low simulating speed of software simulation brings lots of inconveniency in architecture research. FPGA-based simulation system is much faster, but the scale of the system is often limited by the capacity of the FPGA chips. Using more FPGA chips or larger capacity FPGA chip may not only increase the complexity of design, but also increase the cost of research. This paper proposes a novel FPGA-based Simulation mode, which can reduce the compute resource and memory resource consuming of the simulation system efficiently. As the result of it, the large scale parallel architectures can be simulated with limited FPGA resources.