一种可靠的防单粒子翻转系统设计

SRAM-based Fieled Programmable Gate Array(FPGA) is widely used in the field of space because the logic is highly integrated, and it can be reprogrammed. Signle Event Upset (SEU) must be considered in the aerospace applications.This paper took VIRTEX2 series FPGA for example,according to the FPGA configuration memory structure, the paper proposed a reliable SEU defense method. The method made full use of the advantages of timed readback、partial reconfiguration and triple modular redundancy(TMR), and combined these to enhance the ability of FPGA's anti-SEU.In the final the paper designed a fault injection system that is used to simulate SEU. A lot of tests were conducted under the system,and the results prove the the necessity and correctness of the combination of the method.