基于FPGA的数字频率计的设计

ccording to digital basic principle of frequency meter, basic thought, this text of design plan to divide into four pieces of module realize his function, namely whole digital frequency meter system divide into frequency division module, is it tremble circuit , count module , latch module and show such several units as module ,etc. to defend, carry on programming with VHDL to it separately , realize gate control signal , count circuit , location select circuit , show the circuit ,etc.. This article discusses digital frequency meter design principles and procedure by using VHDL hardware descriptive programming. EDA tools and on the basis of field programmable gate array (FPGA) logic device FPGA finish design principles and simulation results of the digital frequency meter.