基于FPGA的变系数定点FIR滤波器设计
esign variable coefficients fixed finite impulse response filter based on FPGA
分析了变系数FIR 滤波器的原理，运用硬件描述语言VHDL 设计变系数定点Q.15格式FIR 滤波器；利用DDS 技术设计三角函数IP 核，利用该信号源作为FIR 滤波器的输入信号，运用其ALTERA 的Quartus II 中的嵌入式逻辑分析仪，在Stratrix II DSP 开发板上对滤波器进行测试，对比测试实验结果表明本文设计的滤波器是正确的。
his paper analyzes the theory of variable coefficients finite impulse response (FIR) filter; Design fixed Q.15 data format filter in VHDL. Design the sine signal as the filter input source signal, test the filter on the Stratrix II DSP development board by using the SignalTap II Logic Analyzer of Quartus II.Comparative test results show that the filter designed in this paper is correct.
许致火、何建新
微电子学、集成电路电子电路电子技术应用
变系数FIR滤波器定点数FPGA
Variable coefficients finite impulse response (FIR) filterfixed dataFPGA
许致火,何建新.基于FPGA的变系数定点FIR滤波器设计[EB/OL].(2009-07-20)[2025-06-28].http://www.paper.edu.cn/releasepaper/content/200907-416.点此复制
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