快速V-BLAST排序检测算法的分析和FPGA实现

his paper firstly presents a fast ordering detection algorithm for V-BLAST System based on QR Decomposition which is applied into 1Gbps wireless transmission demonstration system developed by our research team. This algorithm avoids the iteration for pseudo inverse in traditional Golden ZF-SIC by a new sorting scheme, and achieves lower complexity of MIMO detection under the same performance as traditional Golden ZF-SIC. In the paper, an effective and resource-saving FPGA architecture for this algorithm is proposed, including logic implementation, pipeline design, and fixed point programming. A novel method of LUT division design, “Multi-LUTs” strategy, is proposed to increase the performance of LUT divider. At last an MATLAB simulation is presented to validate the hardware design, which achieves fixed and high throughput (1Gbps as peak rate) in real-time system.