Resource-constrained FPGA Design for Satellite Component Feature Extraction
Resource-constrained FPGA Design for Satellite Component Feature Extraction
The effective use of computer vision and machine learning for on-orbit applications has been hampered by limited computing capabilities, and therefore limited performance. While embedded systems utilizing ARM processors have been shown to meet acceptable but low performance standards, the recent availability of larger space-grade field programmable gate arrays (FPGAs) show potential to exceed the performance of microcomputer systems. This work proposes use of neural network-based object detection algorithm that can be deployed on a comparably resource-constrained FPGA to automatically detect components of non-cooperative, satellites on orbit. Hardware-in-the-loop experiments were performed on the ORION Maneuver Kinematics Simulator at Florida Tech to compare the performance of the new model deployed on a small, resource-constrained FPGA to an equivalent algorithm on a microcomputer system. Results show the FPGA implementation increases the throughput and decreases latency while maintaining comparable accuracy. These findings suggest future missions should consider deploying computer vision algorithms on space-grade FPGAs.
Isaac Silver、Andrew Ekblad、Trupti Mahendrakar、Ryan T. White、Markus Wilde、Brooke Wheeler
航天计算技术、计算机技术电子技术应用
Isaac Silver,Andrew Ekblad,Trupti Mahendrakar,Ryan T. White,Markus Wilde,Brooke Wheeler.Resource-constrained FPGA Design for Satellite Component Feature Extraction[EB/OL].(2023-01-21)[2025-08-18].https://arxiv.org/abs/2301.09055.点此复制
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