基于FPGA的一种DS-UWB快速捕获算法实现
Implement of DS-UWB Rapid Acquisition Algorithm Based on FPGA
文中介绍了一种基于双模板的混合比特翻转搜索算法。该算法是对两步检测算法的改进，在捕获过程的第一阶段和第二阶段中分别采用不同的相关模板，并且采用串并结合的搜索方式快速锁定同步信号。在ISE开发平台上采用Verilog HDL语言对算法的各个模块进行编程并仿真。最后将生成的bit文件下载到FPGA开发板上验证了算法的可行性。
his paper introduces a mixture bit-reverse search algorithm based on double template. It is an improvement of two-steps detection algorithm, which adopts different related templates respectively in the first and second stage of acquisition.So that it locate the sync signal quickly with the combining search ways.In ISE development platform, the Verilog HDL language is used to program and simulate the algorithm modules.Finally a generated bit file is downloaded to the FPGA development board to verify the feasibility of the proposal algorithm.
胡君萍、刘玉林
微电子学、集成电路通信无线通信
S-UWB捕获算法比特翻转法VerilogFPGA
S-UWBacquisition algorithmbit-reverseVerilogFPGA
胡君萍,刘玉林.基于FPGA的一种DS-UWB快速捕获算法实现[EB/OL].(2011-03-16)[2025-08-16].http://www.paper.edu.cn/releasepaper/content/201103-720.点此复制
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