一种CMMB系统中高性能RS译码器的FPGA实现
he Implementation of a High Performance Reed-Solomon Decoder with FPGA in CMMB System
RS码因具有很强的纠突发和随机错误的能力而广泛用于各种通信系统中。采用便于实现并性能较好的BM算法，本文设计并实现了CMMB系统中一种可以纠32个字节错误的时域RS译码器（（240，176））。译码器具有控制简单灵活、面积小、资源耗用较少、工作速率高、数据吞吐量大等优点。
RS code is being widely used in various communication systems because of its strong burst and random error correction ability. In this paper, a time domain RS decoder which can correct 32 errors in CMMB System is implemented. The decoder realized is easy controlled, and it has the advantages of small area, less resources consumed, high process rate, and large data throughput.
陈昕、刘来增、门爱东
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MMBRS译码器FPGABM算法
MMBRS decoderFPGABM algorithm
陈昕,刘来增,门爱东.一种CMMB系统中高性能RS译码器的FPGA实现[EB/OL].(2008-12-05)[2025-08-06].http://www.paper.edu.cn/releasepaper/content/200812-183.点此复制
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