SIC中触发器三模冗余的自动设计与验证
utomatic Design and Verification of Triple Module Redundence of DFFs in ASIC
单粒子翻转是航天电子系统中的重要可靠性问题之一，三模冗余是单粒子翻转的有效加固方法。但是目前三模冗余的实现一般都是通过手工完成，设计效率低下、正确性难以保证。本文研究了verilog门级电路网表的TMR结构自动插入技术，提出了功能正确性的验证以及容错能力的自动验证方法。
Single event upset (SEU) happened in logic devices and memory has gradually become the main source of soft errors. Triple modular redundancy (TMR) is an effective method to harden for SEU. But nowadays the implication of TMR is mainly by manual, which is ineffective and error-prone. In this paper, a automatic TMR insertion technique in verilog gate level netlist is studied. And an automatic functional and fault-tolerant method is presented.
刘必慰
微电子学、集成电路航空航天技术电子技术应用
单粒子翻转三模冗余验证技术设计自动化
SEUTMRVerification TechniqueDesign Automatic
刘必慰.SIC中触发器三模冗余的自动设计与验证[EB/OL].(2013-04-17)[2025-08-04].http://www.paper.edu.cn/releasepaper/content/201304-365.点此复制
评论