基于一阶矩的傅里叶变换的硬件结构设计

he Discrete Fourier Transform (DFT) is an important basic operation in digital signal processing. In this paper a design based on first-order moments to calculate DFT has been implemented. The design was written by hardware description language Verilog and compiled by QUARTUS II . MODELSIM and MATLAB are used for model and simulation.Control Logic, ROM, Line Array, Systolic Logic Array and Result Array have been well described. By analyzing the results from the simulation and synthesis, a conclusion has been acquired that the designs presented in the thesis have met design requirements and have superior practical prospects.