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基于VHDL的DDS的设计与分析

esign method of DDS based on VHDL

中文摘要英文摘要

本文讨论了基于FPGA芯片的直接数字频率合成器(DDS)的设计方法。因为DDS的实现依赖于高速、高性能的数字器件,使用现场可编程器件FPGA,利用其高速、高性能及可重构性的特性,就能根据需要方便地实现各种不同频率的信号输出。

his paper talks about the design method of DDS which is based on FPGA chip. Because the realization of DDS is dependent on digital devices that are high-speed and high quality, we choose FPGA as an objective device. Then by using the high-speed, high quality and re-construction characters of FPGA can conveniently achieve complicated functions of frequency modulation, phase modulation and amplitude modulation according to the demand.

周雷、许文建

微电子学、集成电路电子电路计算技术、计算机技术

直接数字频率合成器,相位累加器,VHDL

irect Digital Frequency Synthesizer Phase Addition VHDL

周雷,许文建.基于VHDL的DDS的设计与分析[EB/OL].(2007-11-02)[2025-08-16].http://www.paper.edu.cn/releasepaper/content/200711-56.点此复制

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