宽带高速数字预失真FPGA实现程序设计
he FPGA Program Design of Broadband High-speed Digital Predistortion
本文在射频收发硬件平台的基础上，对功率放大器数字预失真关键技术进行了研究，并在FPGA中进行了数字预失真的实现。本文研究了只考虑功率放大器奇阶非线性记忆多项式模型的FPGA实现方式的简化，给出了FPGA实现的详细设计。讨论了数字预失真实时处理程序的FPGA实现，然后研究了FPGA与ADC/DAC的接口设计。
In this paper, we do some research in the digital pre-distortion linearization techniques based on the RF transceiver hardware platform, and carry out the algorithm in FPGA. We simplify the odd-order memory polynomial model to realize the algorithm and give the detailed design of the FPGA implementation. The paper also discusses the ADC/DAC interface design to connect the FPGA.
董明洋、于翠屏、高锦春
通信无线通信电子技术应用
功率放大器数字预失真FPGA
PADPDFPGA
董明洋,于翠屏,高锦春.宽带高速数字预失真FPGA实现程序设计[EB/OL].(2012-01-10)[2025-08-02].http://www.paper.edu.cn/releasepaper/content/201201-299.点此复制
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