氧化物厚度变动下的HfO2/SiO2堆栈陷阱性质

he traps profile in four regions (HfO2, HfO2/SiO2, SiO2 and SiO2/Si layers) in HfO2/SiO2 stack was investigated using comparative studies. The charge trapping/detrapping behavior indicates that charge traps are mainly distributed throughout the bulk of HfO2 rather than in SiO2 layer. The capacitance–voltage (C-V) characteristics confirms the above conclusion and further infers the traps distribution is in hypodispersion. The trap density analysis demonstrates that traps are mostly located within or near the interfacial layers (HfO2/SiO2 and SiO2/Si regions) rather than in the bulk of the oxide layers (HfO2 and SiO2 layers). Finally, a preliminary model of the traps distribution in high-k gate stacks is proposed.