基于FPGA的RISC 8位单片机设计
Design of the 8 bit RISC single-chip processor based on FPGA
摘要
本文基于FPGA和RISC的技术，用Verilog HDL语言设计了一个8位单片机，在QuartusⅡ下进行软件仿真，并在硬件上得到应用。这个处理器解决了目前常用嵌入式处理器的指令复杂、执行时间长、执行效率低且硬件框架固定不可根据工程应用修改的缺陷。
关键词：RISC、FPGA、Verilog HDL、8位单片机
Abstract
This paper is based on FPGA and RISC technology，a 8 bit single-chip processor is designed by the Verilog HDL language, simulated in Quartus II software, and applied on the hardware. This processor solved the problem at present commonly used to embedded processor that the instruction was complex, the execution time was long, implementation of efficiency was low,and the hardware frame was fixed which may not revised according to the project application.关键词
RISC，FPGA，Verilog HDL，8位单片机Key words
RISC，FPGA，Verilog HDL，8 bit single-chip processor引用本文复制引用
杨福宝,周启民.基于FPGA的RISC 8位单片机设计[EB/OL].(2008-01-18)[2026-04-04].http://www.paper.edu.cn/releasepaper/content/200801-559.学科分类
微电子学、集成电路/计算技术、计算机技术
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