图像透视变换ASIC设计方案

In this paper, in order to meet the high-performance image perspective transformation need in image processing and automatic recognition field, an ASIC hardware achitecture for perspective transformation algorithm is proposed and implemented using verilog HDL. To solve the problem about high-capacity and high-cost of memory, this achitecture use multiple banks to buit the image memory. Every bank is made by a single port sram. Comparing with other perspective transformation hardware achitecture which usually contains dual port sram, this achitecture has advantages in memory area and price. In the mean time, this achitecture specially design the coordinate transformation method without using Embedded CPU, which improve the calculate speed. Digital circuit function simulation has been made, which indicates 3.78ms is needed to finish a 512*512 image perspective transformation and the output data rate is 78MByte/s. Therefore most of image processing system real-time demand can be accomplished by this achitecture.