基于国密算法SM2、SM3、SM4的高速混合加密系统硬件设计

With the rapid development of electronic information technology, the security of data has become increasingly serious. The traditional single cipher algorithm can not meet the requirements any more. In order to solve these problems, this paper proposed a hardware design scheme of high-speed hybrid encryption system based on SM2, SM3, SM4, in which the hardware structure of SM2 and SM4 algorithms is optimized. Besides, this paper optimized the SM2 algorithm with Karatsuba-Ofman modular multiplier and parallel with point operation. For SM4 algorithm, this paper designed a subpipelining hardware architecture based on composite field S-box so as to improve its throughout. The experimental results showed that all the algorithm circuits implemented by the system have high performance: the point multiplication time of SM2 was 68.37 (s; the hash generation of SM3 only took 0.71 (s; the throughput of SM4 was up to 53.76 Gbit/s. Compared with the SM2 algorithm with the same security, this hybrid system had 26.67% less encryption time. By comparing and analyzing with related work, it can be proved that this scheme has certain advantages in security and encryption and decryption performance.