高电源抑制比的CMOS亚阈值多输出电压基准
High PSRR Multiple Output CMOS Voltage Reference Based on Subthreshold MOSFETs
本文基于工作在亚阈值区的MOS器件，运用CMOS电流模基准对CATA和PTAT电流求和的思想，提出一种具有低温漂系数、高电源抑制比的CMOS电压基准源，电路还具有同时提供多个输出基准电压，并且输出电压可调的特点。提出的基准源基于CSMC 0.5μm标准CMOS工艺，充分利用预调节电路并改进电流模基准核心电路，使整个电路的电源抑制比（PSRR）在低频时达到122dB，温度系数（TC）在0-100℃的温度范围内约为7ppm/℃。
CMOS voltage reference with multiple output, high power supply rejection ratio(PSRR) and low temperature coefficient(TC) is presented. It is based on subthreshold MOSFETs and a CMOS current-mode structure. Pre-regulator and improved voltage reference core of the circuit are proposed. The circuit, designed and simulated in CSMC standard 0.5μm CMOS technology, exhibits PSRR of 122dB at low frequency and TC of 7 ppm/℃ for the range of 0-100℃.
夏晓娟、李泳佳
微电子学、集成电路电子电路
MOS电压基准源电源抑制比亚阈值区电压预调节电路多输出
MOS voltage referencepower supply rejection ratioweak inversion regiontemperature coefficientpre-regulatormultiple output
夏晓娟,李泳佳.高电源抑制比的CMOS亚阈值多输出电压基准[EB/OL].(2009-05-22)[2025-08-02].http://www.paper.edu.cn/releasepaper/content/200905-552.点此复制
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